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publication number S70GL-P_00 revision 03 issue date february 23, 2010 S70GL-P mirrorbit ? flash S70GL-P mirrorbit ? flash cover sheet s70gl02gp 2 gigabit, 3.0 volt-only page mode flash memory featuring 90 nm mirrorbit process technology data sheet notice to readers: this document states the current techni cal specifications regarding the spansion product(s) described herein. each product describ ed herein may be designated as advance information, preliminary, or full production. see notice on data sheet designations for definitions.
2 S70GL-P mirrorbit ? flash S70GL-P_00_03 february 23, 2010 data sheet notice on data sheet designations spansion inc. issues data sheets with advance informati on or preliminary designations to advise readers of product information or int ended specifications throu ghout the product life cycle, including development, qualification, initial production, and fu ll production. in all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. the following descriptions of spansion data sheet designations are presented here to highlight their presence and definitions. advance information the advance information designation indicates that spansion inc. is developing one or more specific products, but has not committed any design to production. information pr esented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. spansion inc. therefore places the following c onditions upon advance information content: ?this document contains information on one or mo re products under development at spansion inc. the information is intended to help you evaluate th is product. do not design in this product without contacting the factory. spansion inc. reserves t he right to change or discont inue work on this proposed product without notice.? preliminary the preliminary designation indicates that the produc t development has progressed such that a commitment to production has taken place. this designation covers several aspects of the product life cycle, including product qualification, initial produc tion, and the subsequent phases in t he manufacturing process that occur before full production is achieved. changes to the technical specifications presented in a preliminary document should be expected while keeping these as pects of production under consideration. spansion places the following conditions upon preliminary content: ?this document states the current technical sp ecifications regarding the spansion product(s) described herein. the preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. due to the phases of the manufacturing process that require maintaining efficiency and quality, this doc ument may be revised by subsequent versions or modifications due to changes in technical specifications.? combination some data sheets contain a combination of products with different designations (advance information, preliminary, or full production). this type of docum ent distinguishes these prod ucts and their designations wherever necessary, typically on the first page, t he ordering information page, and pages with the dc characteristics table and the ac erase and program ta ble (in the table notes). the disclaimer on the first page refers the reader to the notice on this page. full production (no designation on document) when a product has been in production for a period of time such that no changes or only nominal changes are expected, the preliminary designation is remove d from the data sheet. nominal changes may include those affecting the number of ordering part numbers available, such as t he addition or deletion of a speed option, temperature range, package type, or v io range. changes may also include those needed to clarify a description or to correct a typographical error or incorre ct specification. spansion inc. applies the following conditions to documents in this category: ?this document states the current technical sp ecifications regarding the spansion product(s) described herein. spansi on inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. however, typographical or specification corrections, or mo difications to the valid comb inations offered may occur.? questions regarding these docum ent designations may be directed to your local sales office.
publication number S70GL-P_00 revision 03 issue date february 23, 2010 general description the spansion s70gl02gp 2-gigabit mirrorbit flash memory device is fabricated on 90 nm process technology. this device offers a fast page access time of 25 ns with a corresponding ra ndom access time of 110 ns. it features a writ e buffer that allows a maximum of 32 words/64 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word programming algorithms. this makes the device an ideal product for today?s embedded applications that require higher density, better per formance and lower power consumption. distinctive characteristics ? two 1024 megabit (s29gl01gp) in a single 64-ball fortified- bga package (see publication s29gl-p_00 for full specifications) ? single 3v read/program/erase (3.0v - 3.6v) ? 90 nm mirrorbit process technology ? 8-word/16-byte page read buffer ? 32-word/64-byte write buffer reduces overall programming time for multiple-word writes ? secured silicon sector region ? 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random electronic serial number ? can be programmed and locked at the factory or by the customer ? uniform 64kword/128kbyte sector architecture ? s70gl02gp: two thousand forty-eight sectors ? 100,000 erase cycles per sector typical ? 20-year data retention typical ? offered packages ? 64-ball fortified bga ? suspend and resume commands for program and erase operations ? write operation status bits indicate program and erase operation completion ? unlock bypass program command to reduce programming time ? support for cfi (common flash interface) ? persistent and password methods of advanced sector protection ? wp#/acc input ? accelerates programming time (when v acc is applied) for greater throughput during system production ? protects first or last sector of each die, regardless of sector protection settings ? hardware reset input (reset#) resets device ? ready/busy# output (ry/by#) detects program or erase cycle completion S70GL-P mirrorbit ? flash s70gl02gp 2 gigabit, 3.0 volt-only page mode flash memory featuring 90 nm mirrorbit process technology data sheet
4 S70GL-P mirrorbit ? flash S70GL-P_00_03 february 23, 2010 data sheet performance characteristics notes 1. access times are dependent on v cc and v io operating ranges. see ordering information on page 6 for further details. 2. contact a sales representative for availability. max. read access times (ns) (note 1) parameter 2 gb random access time (t acc ) 110 page access time (t pac c )25 ce# access time (t ce ) 110 oe# access time (t oe )25 current consumption (typical values) random access read 30 ma 8-word page read 1 ma program/erase 50 ma standby 2 a program & erase times (typical values) single word programming 60 s effective write buffer programming (v cc ) per word 15 s effective write buffer programming (v acc ) per word 15 s sector erase time (64 kword sector) 0.5 s
february 23, 2010 S70GL-P _00_03 S70GL-P mirrorbit ? flash 5 data sheet table of contents general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 distinctive characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1. ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 recommended combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2. input/output descrip tions & logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 special handling instructions for bga package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 lse064?64 ball fortified ball grid array, 13 x 11 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3. memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. autoselect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5. erase and programming performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6. bga package capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7. revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 S70GL-P mirrorbit ? flash S70GL-P_00_03 february 23, 2010 data sheet 1. ordering information the ordering part number is formed by a valid combination of the following: 1.1 recommended combinations recommended combinations table below list various conf igurations planned to be available in volume. the table below will be updated as new combinations are released. check with your local sales representative to confirm availability of specific configuration not listed or to che ck on newly released combinations. notes 1. contact a local sales representative for availability. 2. bga package marking omits leading ?s29? and packing type designator from ordering part number. 3. packing type ?0? is standard option. s70gl02gp 11 f f c r1 0 packing type 0 = tray (standard; see (note 3) 2 = 7? tape and reel 3 = 13? tape and reel model number (v io range, protection when wp# =v il ) r1 = v io = v cc = 3.0 to 3.6v, highest address sector protected r2 = v io = v cc = 3.0 to 3.6v, lowest address sector protected temperature range i = industrial (?40c to +85c) c = commercial (0c to +85c) package materials set a= pb (note 1) f = pb-free package type f = fortified ball grid array, 1.0 mm pitch package speed option 11 = 110 ns device number/description s70gl02gp 3.0 volt-only, 2048 megabit (128 m x 16-bit/256 m x 8-bit) page-mode flash memory manufactured on 90 nm mirrorbit process technology s29gl-p recommended combinations (note 1) base opn speed (ns) package & temperature model number packing type ordering part number (x = packing type) s70gl02gp 110 ffc, fac (note 2) r1, r2 0, 2, 3 (note 3) s70gl02gp11ffcr1x s70gl02gp11ffcr2x s70gl02gp11facr1x s70gl02gp11facr2x
february 23, 2010 S70GL-P _00_03 S70GL-P mirrorbit ? flash 7 data sheet 2. input/output descriptions & logic symbol table 2.1 identifies the input and output packa ge connections provided on the device. table 2.1 input/output descriptions symbol type description a26?a0 input address lines for gl02gp dq14?dq0 i/o data input/output. dq15/a-1 i/o dq15: data input/output in word mode. a-1: lsb address input in byte mode. ce# input chip enable. oe# input output enable. we# input write enable. v cc supply device power supply. v io supply versatile io input. v ss supply ground. ry/by# output ready/busy. indicates whether an embedded algorit hm is in progress or complete. at v il , the device is actively erasing or progra mming. at high z, the device is in ready. byte# input selects data bus width. at v il , the device is in byte configuration and data i/o pins dq0- dq7 are active. at v ih , the device is in word config uration and data i/o pins dq0-dq15 are active. reset# input hardware reset. low = device resets and returns to reading array data. wp#/acc input write protect/acceleration input. at v il , disables program and erase functions in the outermost sectors. at v hh , accelerates programming; automatically places device in unlock bypass mode. should be at v ih for all other conditions. nc no connect not connected internally.
8 S70GL-P mirrorbit ? flash S70GL-P_00_03 february 23, 2010 data sheet 2.1 special handling instructions for bga package special handling is required for flash memory products in bga packages. flash memory devices in bga packages may be damage d if exposed to ultrasonic cleaning methods. the package and/or data integrity may be compromised if t he package body is exposed to temperatures above 150c for prolonged periods of time. figure 2.1 64-ball fortified ball grid array 64-ball fortified bga top view, balls facing down a2 c2 d2 e2 f2 g2 h2 a 3 c 3 d 3 e 3 f 3 g 3 h 3 a4 c4 d4 e4 f4 g4 h4 a5 c5 d5 e5 f5 g5 h5 a6 c6 d6 e6 f6 g6 h6 a7 c7 d7 e7 f7 g7 h7 dq15/a-1 v ss byte# a16 a15 a14 a12 a1 3 dq1 3 dq6 dq14 dq7 a11 a10 a 8 a9 v cc dq4 dq12 dq5 a19 a21 re s et# we# dq11 dq 3 dq10 dq2 a20 a1 8 wp#/acc ry/by# dq9 dq1 dq 8 dq0 a5 a6 a17 a7 oe# v ss ce# a0 a1 a2 a4 a 3 a1 c1 d1 e1 f1 g1 h1 nc nc v io nc nc nc a26 nc a 8 c 8 b2 b 3 b4 b5 b6 b7 b1 b 8 d 8 e 8 f 8 g 8 h 8 a25 nc a24 v ss v io a2 3 a22 nc
february 23, 2010 S70GL-P _00_03 S70GL-P mirrorbit ? flash 9 data sheet 2.2 lse064?64 ball fortified ba ll grid array, 13 x 11 mm figure 2.2 lse064?64-ball fortified ball grid array (fbga), 13 x 11 mm 3611 \ 16-038.15 \ 11.13.6 package lse 064 jedec n/a d x e 13.00 mm x 11.00 mm package symbol min nom max note a --- --- 1.40 profile a1 0.40 --- --- ball height a2 0.79 --- 0.91 body thickness d 13.00 bsc. body size e 11.00 bsc. body size d1 7.00 bsc. matrix footprint e1 7.00 bsc. matrix footprint md 8 matrix size d direction me 8 matrix size e direction n 64 ball count ?b 0.50 0.60 0.70 ball diameter ee 1.00 bsc. ball pitch ed 1.00 bsc ball pitch sd / se 0.50 bsc. solder ball placement --- depopulated solder balls notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jep95, section 4.3, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9 a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means.
10 S70GL-P mirrorbit ? flash S70GL-P_00_03 february 23, 2010 data sheet 3. memory map the s70gl02gp consist of uniform 64 kword (128 kb) sectors organized as shown in table 3.1 . note this table has been condensed to show sector-related information for an entire device on a single page. sectors and their addre ss ranges that are not explicitly listed (such as sa001-sa2046) have sector starting and ending addresses that form the same pattern as a ll other sectors of that size. for example, all 128 kb sectors have the pattern xxx0000h-xxxffffh. 4. autoselect table 4.1 provides the device identificat ion codes for the s70gl02gp. for more information on the autoselect function, refer to the s29gl-p data sheet (publication number s29gl-p_00). 5. erase and programming performance notes 1. typical program and erase times assume the following conditions: 25c, 3.6 v v cc , 10,000 cycles, checkerboard pattern. 2. under worst case conditions of -40c, v cc = 3.0 v, 100,000 cycles. 3. in the pre-programming step of the embedded erase algo rithm, all bits are programmed to 00h before erasure. 4. system-level overhead is the time required to execute th e two- or four-bus-cycle sequence for the program command. table 3.1 s70gl02gp sector & memory address map uniform sector size sector count sector range address range (16-bit) notes 64 kword/128 kb 2048 sa00 0000000h?000ffffh sector starting address : : sa2047 7ff0000h?7ffffffh sector ending address table 4.1 autoselect addresses in system description address read data (word/byte mode) manufacturer id (base) + 00h xx01h/1h device id, word 1 (base) + 01h 227eh/7eh device id, word 2 (base) + 0eh 2248h/48h device id, word 3 (base) + 0fh 2201h/01h secure device verify (base) + 03h for s70gl02gph: xx19h/19h = not factory locked. xx99h/99h = factory locked. for s70gl02gpl: xx09h/09h = not factory locked. xx89h/89h = factory locked. sector protect verify (sa) + 02h xx01h/01h = locked, xx00h/00h = unlocked table 5.1 erase and programming performance parameter typ (note 1) max (note 2) unit comments sector erase time 0.5 3.5 sec excludes 00h programming prior to erasure (note 3) chip erase time s70gl02gp 1024 4096 sec total write buffer time, for 64 bytes 480 s excludes system level overhead (note 4) total accelerated write buffer programming time, for 64 bytes 432 s chip program time s70gl02gp 1968 sec
february 23, 2010 S70GL-P _00_03 S70GL-P mirrorbit ? flash 11 data sheet 6. bga package capacitance notes 1. sampled, not 100% tested. 2. test conditions t a = 25c, f = 1.0 mhz. parameter symbol parameter description test setup typ max unit c in input capacitance v in = 0 12 20 pf c out output capacitance v out = 0 20 24 pf c in2 control pin capacitance v in = 0 16 20 pf reset#, wp#/acc separated control pin v in = 0 84 90 pf ce# separated control pin v in = 0 44 50 pf
12 S70GL-P mirrorbit ? flash S70GL-P_00_03 february 23, 2010 data sheet 7. revision history section description revision 01 (december 4, 2006) initial release. revision 02 (may 19, 2008) global changed data sheet designation added product life-cycle notice removed table of figures and table of tables ordering information - changed sample opn - added commercial temperature range - changed configuration in ?d evice number/description? - modified ?recommended combination? table & removed tsop package option erase and program performance chip program time: removed comment common flash memory interface removed secti on (see publication s29gl-p_00 for details) revision 03 (february 23, 2010) global updated available model options. corrected chip program time.
february 23, 2010 S70GL-P _00_03 S70GL-P mirrorbit ? flash 13 data sheet colophon the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, genera l office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for any use that includes fatal risks or dangers t hat, unless extremely high safety is secured, could have a s erious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic contro l, mass transport control, medical life support system, missile launch control in we apon system), or (2) for any use where chance of failure is intole rable (i.e., submersible repeater and artifi cial satellite). please note that spansion will not be liable to you and/or any third party for any claims or damages arising in connection with abo ve-mentioned uses of the products. any semic onductor devices have an inherent chance of failure. you must protect agains t injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document r epresent goods or technologies s ubject to certain restriction s on export under the foreign exchange and foreign trade law of japan, the us export ad ministration regulations or the applicable laws of any oth er country, the prior authorization by the respective government entity will be required for export of those products. trademarks and notice the contents of this document are subjec t to change without notice. this document ma y contain information on a spansion product under development by spansion. spansion reserves the right to change or discontinue work on any product without notice. the informati on in this document is provided as is without warran ty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. spansion assume s no liability for any damages of any kind arising out of the use of the information in this document. copyright ? 2006-2010 spansion inc. all rights reserved. spansion ? , the spansion logo, mirrorbit ? , mirrorbit ? eclipse?, ornand?, ecoram? and combinations thereof, are trademar ks and registered trademarks of spansion llc in the united states and other count ries. other names used are for informati onal purposes only and may be trademarks of their respective owners.

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